This invention relates to a logic circuit, and more particularly to a logic circuit suitable for use with integrated-injection logic (I.sup.2 L) gates.
Hitherto, a logic circuit such as a D-type flip-flop circuit and frequency divider or binary counter for generating an output signal having half the frequency of clock pulses supplied thereto generally comprises six or eight logic gates (NAND/NOR gates). Application of as few logic gates as possible is desired to elevate the integration density of an integrated logic circuit, decrease power consumption and ensure high speed operation.